This invention generally relates, to photolithographic patterning and anisotropic etching of semiconductor features and more particularly to an improved method for manufacturing semiconductor features including bottom anti-reflective coating (BARC) layers over low-k dielectric insulating layers to prevent the formation of undeveloped photoresist and the phenomenon of etching stop during anisotropic etching.
Since the introduction of semiconductor devices, the size of semiconductor devices has been continuously shrinking, resulting in smaller semiconductor chip size and increased device density. One of the limiting factors in the continuing evolution toward smaller device size and higher density has been the stringent requirements placed on photolithographic processes. One recurring problem in photolithography, especially with porous low dielectric constant (low-k) dielectric insulating materials, is photoresist poisoning caused by residual nitrogen containing species interfering with photoresist exposure and development processes.
In the fabrication of semiconductor devices multiple levels may be required for providing a multi-level interconnect structure. During the manufacture of integrated circuits it is common to place material photoresist on top of a semiconductor wafer in desired patterns and to anisotropically etch away or otherwise remove surrounding material not covered by the resist pattern in order to produce metal interconnect lines or other desired features. For example, during the formation of multi-level semiconductor devices the various levels must be electrically interconnected through and within a device level. Electrical interconnects are typically formed by anisotropically etching openings in a dielectric insulating layer an filling them with metal to form electrically interconnecting lines. For example, vias extend through an insulating layer to electrically interconnect levels of a device while trench lines, in turn electrically connected to vias, electrically interconnect the various portion of a device within a device level. The damascene process is a well known semiconductor fabrication method for forming electrical interconnects between and within levels by forming vias and trench lines.
For example, in an exemplary process for forming dual damascene structures, a via opening is first anisotropically etched in an insulating layer also known as an inter-metal dielectric (IMD) layer. The insulating layer is typically formed over a metal or conductive area including an overlying lining or etching stop layer. After a series of photolithographic and anisotropic etching steps forming a respective via opening and overlying trench opening encompassing the via opening, the via opening and the trench opening are filled with a metal (e.g., Al, Cu) to form via and trench line portions of a dual damascene structure. The excess metal above the trench level is then removed by well known chemical-mechanical polishing (CMP) processes.
As feature sizes in anisotropic etching process have diminished, photolithographic patterning processes require activating light (radiation) of increasingly smaller wavelength. For 0.25 micron and below CMOS technology, deep ultraviolet (DUV) photoresists have become necessary to achieve the desired resolution. Typically DUV photoresists are activated with activating light source wavelengths of less than about 250 nm, for example, commonly used wavelengths include 193 nm and 248 nm. Many DUV photoresists are chemically amplified using a photoacid generator activated by the light source to make an exposed area soluble in the development process.
One problem affecting DUV photoresist processes as been the interference of residual nitrogen-containing species, for example amines, with the DUV photoresist. Residual nitrogen-containing contamination is one of the greater concerns in the use of metal nitride layers such as silicon oxynitride which is commonly used as a bottom-anti-reflective coating (BARC) also referred to as a dielectric anti-reflective coating (DARC). Metal nitride layers, such as silicon oxynitride and silicon nitride are also frequently used as etching stop layers. The nitride layers are frequently formed by CVD processes using amine and amide containing precursors which tend to diffuse into adjacent porous layers of dielectric insulating layers. For example, the increasing use of low-k dielectric materials, typically having a high degree of porosity, facilitates absorption and transport of contaminating chemical species. For example, it is believed that nitrogen radicals created due to the presence of nitrogen containing species, such as amines and amides, interfere with chemically amplified DUV photoresists by neutralizing the acid catalyst, thereby rendering the contaminated portion of the photoresist insoluble in the developer. As a result, residual photoresist may remain on patterned feature edges, sidewalls, or floors of features, affecting subsequent etching or metal filling processes leading to, for example, electrical open circuits or increased resistivity.
Approaches to prevent the diffusion of contaminating nitrogen containing species from overlying etching stop or BARC layers including for example silicon oxynitride, include forming a silicon dioxide layer over the low dielectric constant IMD layer prior to forming the etching stop or BARC layers. A shortcoming of this approach is the added stresses applied to the IMD layer and the added contribution to the overall capacitance of the multi-level semiconductor device.
Another approach has been to use a carbon based BARC""s, thereby avoiding the presence of nitrogen contaminating species. A shortcoming of this approach is that a carbon based BARC during anisotropic etching contributes to the formation of polymer residues on the sidewalls and bottoms of the etched feature frequently slowing the etching rate within the feature, also referred to as etch stop phenomena.
The key mechanisms responsible for achieving high aspect ratio anisotropic etching with a high etching selectivity involves the combination several factors including the deposition of nonvolatile residue, e.g., a polymeric carbon containing residue on various etching surfaces during the etching process acting to slow the relative etching rate on those surfaces
If the formation of polymeric residual species proceeds at too high a rate, a condition often referred to as xe2x80x9cetch stopxe2x80x9d or aspect ratio dependent etching (ARDE) occurs with respect to high aspect ratio features, such as contact holes and vias. For example, during the etching of a contact hole or via, a nonvolatile polymeric residual layer may be formed on the sidewalls and bottom surface of the contact hole or via from carbon containing neutral species resulting from the etch process. The carbon for forming the polymeric residue may originate from hydrofluorocarbons used in the etching process, for example, carbon-rich hydrofluorocarbons or the etching target material such as the IMD layer and carbon based BARC""s. Deposition of the polymeric residue and etching of the oxide layer occur simultaneously. When high aspect ratio features are etched, the etch rate and etch chemistry vary with the aspect ratio and etching depth of the feature. Often the etching process begins normally until the etched hole reaches a particular depth or aspect ratio at which point the etching process undesirably stops due to excess deposition of polymeric residue within the etched feature, i.e., xe2x80x9cetching stopxe2x80x9d phenomenon.
The use of carbon based BARC""s exacerbates the problem of etching stop especially in areas where there are a few or isolated contact holes or vias. Complex chemistry equilibria in the etching chemistry are believed to be responsible or the sensitivity of high aspect ratio single or isolated anisotropically etched openings. For example, a higher concentration of carbon species at steady state is believed to exist locally over areas where there is a low density of openings being etched thereby increasing the rate of polymer formation and deposition within the etched feature.
There is therefore a need to develop a method whereby reliable anisotropic etching processes may be carried out in the presence of nitrogen and carbon based BARC""s including preventing the formation of undeveloped photoresist residue and etching stop.
It is therefore an object of the invention to provide a method whereby reliable anisotropic etching processes may be carried out in the presence of nitrogen and carbon based BARC""s including preventing the formation of undeveloped photoresist residue and etching stop while overcoming other shortcomings and deficiencies in the prior art.
To achieve the foregoing and other objects, and in accordance with the purposes of the present invention, as embodied and broadly described herein, the present invention provides a method for preventing carbon and nitrogen penetration from a deposited overlayer into a dielectric insulating layer to improve a subsequent photolithographic patterning and anisotropic etching process.
In a first embodiment, the method includes providing a semiconductor wafer having a process surface including an exposed dielectric insulating layer; and, subjecting the dielectric insulating layer to a hydrogen containing plasma treatment to form a penetration resistance to one of nitrogen containing and carbon containing species.
These and other embodiments, aspects and features of the invention will become better understood from a detailed description of the preferred embodiments of the invention which are described below in conjunction with the accompanying drawings.